Alan Robert - PDFSEARCH.IO - Document Search Engine

Alan Robert
Results: 308

#	Item
161	Improvements to Combinational Equivalence Checking Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-08-09 21:17:37 Formal methods Logic in computer science NP-complete problems And-inverter graph Diagrams Boolean satisfiability problem Satisfiability Logic synthesis Automatic test pattern generation Electronic engineering Theoretical computer science Electronic design automation
162	SAT-Based Logic Optimization and Resynthesis Alan Mishchenko Robert Brayton Jie-Hong Roland Jiang Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-04-23 22:32:02 Electronic design automation Boolean network Science Mathematics Design Diagrams Formal methods And-inverter graph
163	On Breakable Cyclic Deﬁnitions Jie-Hong R. Jiang, Alan Mishchenko, and Robert K. Brayton Department of Electrical Engineering and Computer Sciences University of California, Berkeley ABSTRACT Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-05-01 20:25:39 Digital typography Western calligraphy Calligraphy Collation Latin-derived alphabet World glyph set Latin alphabets Character encoding Latin script
164	Incremental Sequential Equivalence Checking and Subgraph Isomorphism Sayak Ray Alan Mishchenko Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-07-12 14:37:50 Applied mathematics And-inverter graph Electronic design automation Subgraph isomorphism problem Automatic test pattern generation Graph isomorphism Theoretical computer science Mathematics Diagrams
165	Technology Mapping with Boolean Matching, Supergates and Choices Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-04-19 22:57:46 Logic synthesis Circuit Standard cell Boolean function Electronic engineering Electronic design automation And-inverter graph
166	Scalably-Verifiable Sequential Synthesis Robert Brayton Alan Mishchenko Department of EECS, University of California, Berkeley Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-10-02 14:31:33 Electronic design automation Digital electronics Logic in computer science Electrical circuits And-inverter graph Retiming Automatic test pattern generation Formal verification Combinational logic Electronic engineering Formal methods Theoretical computer science
167	Page 40 THE LANDMARK Holden, Massachusetts Balance Rock Center - A Fresh Approach to Education An affordable new intellectual and creative alternative for teenagers who: Add to Reading List Source URL: www.thelandmark.com Language: English - Date: 2015-02-10 10:27:45 Rich Dad Business Alan Greenspan Quinsigamond Community College Finance Sharon Lechter Robert Kiyosaki Salespeople United States
168	Efficient Implementation of Property Directed Reachability∗ Niklas Een, Alan Mishchenko, Robert Brayton {een,alanmi,brayton}@eecs.berkeley.edu Berkeley Verification and Synthesis Research Center EECS Department Univers Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2012-06-06 17:57:57 Unit propagation Cube Clause Geometry Euclidean geometry Automated theorem proving
169	FRAIGs: A Unifying Representation for Logic Synthesis and Verification Alan Mishchenko, Satrajit Chatterjee, Roland Jiang, Robert Brayton Department of EECS, University of California, Berkeley {alanmi, satrajit, jiejiang Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-04-01 15:19:32 Boolean algebra Diagrams Digital electronics And-inverter graph Binary decision diagram Logic optimization Model checking Boolean function Logic synthesis Electronic engineering Electronic design automation Formal methods
170	An Integrated Technology Mapping Environment Alan Mishchenko Satrajit Chatterjee Robert Brayton Department of EECS University of California, Berkeley {alanmi, satrajit, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-07-16 00:13:15 Integrated circuits Electronic design Placement Logic synthesis Field-programmable gate array Jason Cong Complex programmable logic device Application-specific integrated circuit Electronic engineering Electronics Electronic design automation

UPDATE